| YEAR |
TITLE |
| 2023 |
9.9 µW, 140 dB DR, and 93.27 dB SNDR, Double Sampling ΔΣ Modulator Using High Swing Inverter-Based Amplifier for Digital Hearing Aids
S Alizadeh Zanjani, A Jannesari, P Torkzadeh
Electronics 12 (7), 1747
|
| 2023 |
A robust digital predistorter based on complex hermite polynomial for direct conversion transmitter linearization
E Majdinasab, A Jannesari
Analog Integrated Circuits and Signal Processing 114 (3), 417-429
|
| 2023 |
A PVT resilient true‐time delay cell
A Yarahmadi, A Jannesari
IET Circuits, Devices & Systems
|
| 2022 |
Joint digital pre-distortion model based on Chebyshev expansion.
E Majdinasab, A Jannesari
International Journal of Electrical & Computer Engineering (2088-8708)
12 (4)
|
| 2022 |
Joint Compensation of Power Amplifier Nonlinearity and Quadrature Modulator
Mismatches Based on Jacobi Polynomials Nonlinear Model
E Majdi Nasab, A Jannesari
Journal of Iranian Association of Electrical and Electronics Engineers
19 (3 …
|
| 2021 |
A 280mv Input Fast Transient Startup Charge Pump with a 4 Phase Ring
Oscillator for Energy Harvesting Applications
V Seif, A Jannesari
2021 Iranian International Conference on Microelectronics (IICM),
1-4
|
| 2021 |
High-Q, High-Rejection Ratio Complex Second-Order Charge-Sampling Switched
- Semi-Passive Band-Pass Filter
MS Jafari, A Jannesari
Journal of Circuits, Systems and Computers 30 (11), 2150192
|
| 2021 |
Wideband Inductorless True Time Delay Cell Based on CMOS Inverter for
Timed Array Receivers
A Yarahmadi, A Jannesari
Circuits, Systems, and Signal Processing 40 (8), 3703-3726
|
| 2021 |
Diagnosis of Valvular Heart Disease Based on Ensemble Learning
B Ghardashbegi, A Jannesari
Computational Intelligence in Electrical Engineering 12 (1), 1-14
|
| 2021 |
A higher-order highly linear N-path band-pass filter
A Hemati, A Jannesari
Circuits, Systems, and Signal Processing 40 (1), 50-69
|
| 2020 |
A Double Balanced Mixer with Folded Structure and Variable-Conversion
gain in 65nm CMOS
MR Nikbakhsh, A Jannesari, E Abiri, S Salem
2020 28th Iranian Conference on Electrical Engineering (ICEE), 1-5
|
| 2020 |
Cell Weighting and Gate Inductive Peaking Techniques for Wideband Noise
Suppression in Distributed Amplifiers
B Mesgari, S Saeedi, A Jannesari
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (12),
4507-4520
|
| 2020 |
Fast-Transient-Response Low-Voltage Integrated, Interleaved DC–DC Converter
for Implantable Devices
NC Shirazi, A Jannesari, P Torkzadeh
Journal of Circuits, Systems and Computers 29 (01), 2050013
|
| 2019 |
A parasitic insensitive passive switched‐capacitor interpolation finite
impulse response filter
A Nakhi, A Jannesari
International Journal of Circuit Theory and Applications 47 (11),
1736-1761
|
| 2019 |
Design of a highly linear gain stage with complementary derivative superposition
technique
A Yarahmadi, A Jannesari
Wireless Personal Communications 107 (4), 1709-1716
|
| 2019 |
Noise shaping in low noise amplifiers using active feedback and pole-zero
adjustment
H Sahoolizadeh, A Jannesari, M Dousti
Microelectronics Journal 89, 1-15
|
| 2019 |
Charge‐sharing bandpass filter with independent bandwidth and centre
frequency adjustment
H Ganji, A Jannesari, Z Sohrabi
Electronics Letters 55 (11), 638-640
|
| 2019 |
High dynamic range pseudo–two‐level digital pulse‐width modulation for
power‐efficient RF transmitters
A Arian, A Jannesari
International Journal of Circuit Theory and Applications 47 (1),
65-86
|
| 2018 |
Noise suppression in a common-gate UWB LNA with an inductor resonating
at the source node
H Sahoolizadeh, A Jannesari, M Dousti
AEU-International Journal of Electronics and Communications 96,
144-153
|
| 2018 |
Self-start-up fully integrated DC-DC step-up converter using body biasing
technique for energy harvesting applications
NC Shirazi, A Jannesari, P Torkzadeh
AEU-International Journal of Electronics and Communications 95,
24-35
|
| 2018 |
Corrigendum to “A 12-bit 100 MS/s pipelined ADC without using front-end
SHA” International Journal of Electronics and Communications (AEÜ) 86
(2018) 142-153
H Imanpoor, M Mehranpouy, P Torkzadeh, A Jannesari
AEU-International Journal of Electronics and Communications 88,
174
|
| 2018 |
A 12-bit 100 MS/s pipelined ADC without using front-end SHA
H Imanpoor, M Mehranpouy, P Torkzadeh, A Jannesari
AEU-International Journal of Electronics and Communications 86,
142-153
|
| 2018 |
Power‐efficient burst‐mode RF transmitter based on reference‐adaptive
multilevel pulse‐width modulation
A Arian, A Jannesari
International Journal of Circuit Theory and Applications 46 (3),
427-452
|
| 2018 |
A Ka-Band Low Phase-Shift CMOS Variable Gain Low Noise Amplifier
BAM Mohammadpour, A JANNESARI, A Nabavi
ELECTRONIC INDUSTRIES 8 (4), 11-20
|
| 2017 |
A Low-Power Three-Tap DFE with Switched Resistor Slicer and CTLE in
0.18m CMOS Technology
M Fallahi, A Jannesari
Journal of Circuits, Systems and Computers 26 (12), 1750199
|
| 2017 |
A new approach to frequency-domain noise analysis and design of a very-low
noise amplifier in radio and microwave frequencies
H Sahoolizadeh, A Jannesari, M Dousti
Microelectronics journal 68, 14-22
|
| 2017 |
A sub-2-dB noise figure linear wideband low noise amplifier in 0.18
µm CMOS
R Jafarnejad, A Jannesari, J Sobhi
Microelectronics journal 67, 135-142
|
| 2017 |
A linear ultra wide band low noise amplifier using pre-distortion technique
R Jafarnejad, A Jannesari, J Sobhi
AEU-International Journal of Electronics and Communications 79,
172-183
|
| 2017 |
Analysis and design of discrete‐time charge domain filters with complex
conjugate poles
Z Sohrabi, A Jannesari
International Journal of Circuit Theory and Applications 45 (4),
530-549
|
| 2017 |
Pre-distortion technique to improve linearity of low noise amplifier
R Jafarnejad, A Jannesari, J Sobhi
Microelectronics Journal 61, 95-105
|
| 2017 |
Harmonic fold back reduction at the N‐path filters
A Hemati, A Jannesari
International Journal of Circuit Theory and Applications 45 (3),
419-438
|
| 2016 |
Design of a high-frequency very low-power direct digital frequency synthesizer
M Hasannezhad, A Jannesari, M Lotfizad
Journal of Circuits, Systems and Computers 25 (08), 1650085
|
| 2016 |
Low-phase-noise CMOS VCO with new drain–gate feedback path
M Rezaei, A Jannesari
Analog Integrated Circuits and Signal Processing 88 (1), 89-95
|
| 2016 |
Second‐order charge‐sampling structure utilising passive scheme to implement
complex conjugate poles
Z Sohrabi, A Jannesari
Electronics Letters 52 (12), 1015-1016
|
| 2016 |
A 2-GHz ROM-less direct digital frequency synthesizer based on an analog
sine-mapper circuit
M Beheshti, A Jannesari
2016 24th Iranian Conference on Electrical Engineering (ICEE), 1603-1608
|
| 2016 |
A 670μW inductorless low noise amplifier employing dual capacitive cross
coupling and dual negative feedback
R Jafarnejad, A Jannesari, J Sobhi
2016 24th Iranian Conference on Electrical Engineering (ICEE), 972-977
|
| 2016 |
Two-path inverter-based low noise amplifier for 10–12 GHz applications
A Yarahmadi, A Jannesari
Microelectronics journal 50, 76-82
|
| 2016 |
A low power low noise amplifier employing negative feedback and current
reuse techniques
R Jafarnejad, A Jannesari, A Nabavi, A Sahafi
Microelectronics Journal 49, 49-56
|
| 2015 |
Complex conjugate poles implementation in discrete‐time charge‐domain
filters
Z Sohrabi, A Jannesari
Electronics Letters 51 (16), 1236-1238
|
| 2015 |
A 128‐channel discrete cosine transform‐based neural signal processor
for implantable neural recording microsystems
H Hosseini‐Nejad, A Jannesari, AM Sodagar, JN Rodrigues
International Journal of Circuit Theory and Applications 43 (4),
489-501
|
| 2014 |
Direct Digital Frequency Synthesizer design with non-uniform squared-sine-weighted
Digital-to-Analog Convertor
M HasanNezhad, A Jannesari
7th International Symposium on Telecommunications (IST2014), 394-399
|
| 2014 |
High-frequency Direct Digital Frequency Synthesizer design with non-uniform
sine-weighted Digital-to-Analog Convertor
M HasanNezhad, A Jannesari
7th International Symposium on Telecommunications (IST2014), 159-164
|
| 2014 |
A wideband low noise distributed amplifier with active termination
B Mesgari, S Saeedi, A Jannesari
7th International Symposium on Telecommunications (IST2014), 170-174
|
| 2014 |
A new pole-zero technique for reducing thermal noise to design a very
low noise figure UWB LNA
H Sahoolizadeh, A Jannesari, M Dousti
2014 22nd Iranian Conference on Electrical Engineering (ICEE), 279-283
|
| 2013 |
A Sub-µW Tuneable Switched-Capacitor Amplifier-Filter for Neural Recording
using a Class-C Inverter
A Ghorbani-Nejad, A Jannesari
Iranian Journal of Electrical and Electronic Engineering 9 (4),
224-231
|
| 2013 |
Data compression in brain-machine/computer interfaces based on the Walsh–Hadamard
transform
H Hosseini-Nejad, A Jannesari, AM Sodagar
IEEE transactions on biomedical circuits and systems 8 (1), 129-137
|
| 2013 |
Dual-mode high gain and high-Q active RF band pass filter
S Rahmatollahi, B Fotouhi, A Jannesari
2013 21st Iranian Conference on Electrical Engineering (ICEE), 1-5
|
| 2013 |
Design of high-throughput QC-LDPC decoder for WiMAX standard
T Heidari, A Jannesari
2013 21st Iranian Conference on Electrical Engineering (ICEE), 1-4
|
| 2013 |
A precise ΔΣ-based Digitally Controlled Oscillator (DCO) for all-digital
PLL
S Jafarzade, A Jannesari
2013 21st Iranian Conference on Electrical Engineering (ICEE), 1-4
|
| 2012 |
A new Architecture for two-stage OTA with no-miller capacitor compensation
S Moallemi, A Jannesari
2012 IEEE International Conference on Circuits and Systems (ICCAS),
180-183
|
| 2012 |
A simple pre-filtering for spectral smoothing in a radio frequency digital
to analog converter
S Rahmatollahi, A Jannesari
2012 IEEE International Conference on Circuits and Systems (ICCAS),
103-106
|
| 2012 |
Data compression based on discrete cosine transform for implantable
neural recording microsystems
H Hosseini-Nejad, A Jannesari, AM Sodagar
2012 IEEE International Conference on Circuits and Systems (ICCAS),
209-213
|
| 2012 |
The design of reconfigurable delta-sigma modulator for software defined
radio applications
S Moallemi, A Jannesari
2012 IEEE International Conference on Circuits and Systems (ICCAS),
254-257
|
| 2012 |
A High Dynamic Range Digitally-Controlled Oscillator (DCO) for All-Digital
PLL Systems
S Jafarzade, A Jannesari
The Modares Journal of Electrical Engineering 12 (2), 16-21
|
| 2012 |
A low-power continuous-time low-pass analog filter for IEEE 802.11 a/b/g/n
wireless LANs
BB Mohammadi, A Jannesari
20th Iranian Conference on Electrical Engineering (ICEE2012), 1-5
|
| 2012 |
A Linearly Tuneable Ultra Low Power CMOS transconductor with its application
to Gm-C filters
L Mohammadi, A Jannesari
20th Iranian Conference on Electrical Engineering (ICEE2012), 6-11
|
| 2012 |
A merged LNA and mixer with improved noise figure and gain for software
defined radio applications
H Elyasi, A Jannesari, A Nabavi
IEICE Electronics Express 9 (3), 165-171
|
| 2011 |
Multi-Level 2D LUT as digital pre-distorter for linearizing memory affected
RF power amplifiers
A Hormozi, A Jannesari
IEICE Electronics Express 8 (19), 1569-1575
|
| 2011 |
A high gain, wide-band, fast settling amplifier with no-miller capacitor
compensation
S Moallemi, A Jannesari
IEICE Electronics Express 8 (20), 1751-1756
|
| 2010 |
A low-power sub-threshold CMOS continuous-time active-filter with reduced
in-band noise for WiMAX applications
M Ataei, M Tamaddon, A Jannesari
2010 IEEE Asia Pacific Conference on Circuits and Systems, 851-854
|
| 2008 |
Sinusoidal shaping of the ISF in LC oscillators
A Jannesari, M Kamarei
International Journal of Circuit Theory and Applications 36 (7),
757-768
|
| 2008 |
Comments on" Comments on" A General Theory of Phase Noise in Electrical
Oscillators""-Reply
A Jannesari, M Kamarei
IEEE JOURNAL OF SOLID-STATE CIRCUITS 43 (9), 2170-2170
|
| 2007 |
Design of a low voltage low-phase-noise complementary CMOS VCO
A Jannesari, M Kamarei
2007 International Symposium on Integrated Circuits, 426-429
|
| 2007 |
Comments on “A general theory of phase noise in electrical oscillators”
A Jannesari, M Kamarei
IEEE Journal of Solid-State Circuits 42 (10), 2314-2314
|
| 2007 |
Source-injection serial coupled CMOS LC quadrature VCO
A Jannesari, M Kamarei
IEICE Electronics Express 4 (14), 467-471
|
| 2007 |
Sinusoidal-switched serial-coupled CMOS LC quadrature VCO
A Jannesari, M Kamarei
IEICE Electronics Express 4 (13), 423-429
|
| 2005 |
A novel implementation of the IEEE802. 11 medium access control
S Samadi, A Golmohammadi, A Jannesari, MR Movahedi, B Khalaj, ...
2006 International Symposium on Intelligent Signal Processing and
…
|
| 2003 |
On the parasitic-sensitivity of switched-capacitor summing-integrator
structures for/spl Sigma//spl Delta/modulators
SJ Ashtiani, O Shoaei, SMR Hasan, A Jannesari
IEEE Transactions on Circuits and Systems II: Analog and Digital
Signal …
|
| |
Communications (AEÜ)
R Jafarnejad, A Jannesari, J Sobhi
|
| |
A Complementary Self-Biased CMOS Amplifier for Very Low Noise X-Band
Amplification
A Yarahmadi, A Jannesari
|
| |
014-“A Fast Digital Phase Locked Loop Based on Model Predictive Controller”
BB Mohammadi, A Jannesari, L Mohammadi, A Jannesari, ...
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